I am excited to share my recent project, ActiveCpp, which is now live on my website samiralavi.github.io/activecpp/main. ActiveCpp is a powerful and versatile C++ library that simplifies asynchronous programming and enables developers to create highly responsive applications.
I have designed this lovely coaster that reminds anyone of the perfect engineering embedded in Arduino after every sip of their coffee. It is made of high-quality printed circuit board (PCB) material, lead-free, and gold plated with nice round corners. It feels very professional and is a must if you work with electronic devices. The content of the cheat sheet is carefully chosen by me after working with Arduino for many years to include the mostly used commands and libraries.
Recently, I have faced an issue in accessing my USB JLink programmer from inside a docker container using WSL 2. I have found that this process is not well documented and requires advanced understanding of how USB devices work under WSL and inside Linux. After spending a few hours and playing with different tools and commands, I decided to document the steps I have followed here for the community.
Co-design of software and hardware for FGPA-based embedded systems has become a major challenge for tech companies, pushing them to follow development processes that require special care to lower the risks. The risk becomes a major factor for system on chip (SoC) solutions with integrated intellectual property (IP) cores that require custom firmware or driver development. A solution to this problem that has received a lot of interest in the last few years is by simulating the IPs and using them to design and validate the corresponding software stacks. Verilator is an open-source tool that is specifically developed for this purpose to simulate the IPs written in Verilog or SystemVerilog hardware description languages. In this talk, I am going to discuss the following topics for the audience:
A brief introduction to SystemC and simulation of logic blocks in C++
Common processes for co-design of firmware and FPGA IP cores
Introduction to Verilator and using it for creating simulation models from IP cores
Protecting IPs by encrypting their simulated models and sharing pre-releases
An example workflow for Verilog IP simulation and firmware design in C++
Analysis of simulation results with open source tools
Real-time simulation of verilated models with QEMU for system integration
There are several communication models that can be used in a distributed control system. Each model has its pros and cons, therefore the system designer has to decide which model to employ for the implementation of the control system based on what each pattern offers. In this article, several communication patterns are reviewed and compared with each other to understand their use cases. In the following, a comparative analysis has been given for a number of common communication patterns, for the purpose of the appropriate employment in distributed control systems and IoT devices.
Figure 1: a) Request-Response pattern, and b) Events pattern
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In this experiment, we want to build a cheap DC-DC buck converter using the common electronic components available online. The pulse width modulation (PWM) switching signal is generated using Arduino Uno and drives the gate of P-Channel Metal oxide silicon field effect transistor (MOSFET) through a bipolar junction transistor (BJT).
A buck converter or a step-down converter is a DC-to-DC power converter, which steps down voltage (while stepping up current) from its input (supply) to its output (load). It is a class of switched-mode power supply (SMPS), typically containing at least two semiconductors (a diode and a transistor, although modern buck converters frequently replace the diode with a second transistor used for synchronous rectification) and at least one energy storage element, a capacitor, inductor, or the two in combination. To reduce voltage ripple, filters made of capacitors (sometimes in combination with inductors) are normally added to such a converter's output (load-side filter) and input (supply-side filter).